PROTEUS

PROTEUS

 

            ALL EMBEDDED DEVELOPERS ARE LOOKING FOR THE BETTER SOFTWARE FOR SIMULATION. SIMULATION IS NOTHING BUT THE 50 PERCENT OF REAL TIME HARDWARE IMPLEMENTATION. HERE IS THE POST TO EXPLAIN ABOUT THE PROTEUS. THE BEST SIMULATION SOFTWARE FOR EMBEDDED DEVELOPMENT.........

        Many CAD users dismiss schematic capture as a necessary evil in the process of creating PCB layout but we have always disputed this point of view. With PCB layout now offering automation of both component placement and track routing, getting the design into the computer can often be the most time consuming element of the exercise. And if you use circuit simulation to develop your ideas, you are going to spend even more time working on the schematic.

           ISIS has been created with this in mind. It has evolved over twelve years research and development and has been proven by thousands of users worldwide. The strength of its architecture has allowed us to integrate first conventional graph based simulation and now - with PROTEUS VSM - interactive circuit simulation into the design environment. For the first time ever it is possible to draw a complete circuit for a micro-controller based system and then test it interactively, all from within the same piece of software. Meanwhile, ISIS retains a host of features aimed at the PCB designer, so that the same design can be exported for production with ARES or other PCB layout software.

              For the educational user and engineering author, ISIS also excels at producing attractive schematics like you see in the magazines. It provides total control of drawing appearance in terms of line widths, fill styles, colours and fonts. In addition, a system of templates allows you to define a ‘house style’ and to copy the appearance of one drawing to another.

Other general features include:

• Runs on Windows 2k onwards.
• Automatic wire routing and dot placement/removal.
• Powerful tools for selecting objects and assigning their properties.
• Total support for buses including component pins, inter-sheet terminals, module ports and wires.
• Bill of Materials and Electrical Rules Check reports.
• Netlist outputs to suit all popular PCB layout tools.

For the ‘power user’, ISIS incorporates a number of features which aid in the management of large designs. Indeed, a number of our customers have used it to produce designs containing many thousands of components.

• Hierarchical design with support for parameterized component values on sub-circuits.
• Design Global Annotation allowing multiple instances of a sub-circuit to have different component references.
• Automatic Annotation - the ability to number the components automatically.
• ASCII Data Import - .this facility provides the means to automatically bring component stock codes and costs into ISIS design or library files where they can then be incorporated or even totaled up in the Bill of Materials report.

SYSTEM REQUIREMENTS

Performance in ISIS is scaleable according to your computer specification. The following are the recommended minimums requirements :

• 1GHz or faster Intel Pentium processor (AMD processors fine but less optimised).
• Graphics card supporting OpenGL Version 2.0 or higher and multi-sampling (MSAA).
• 256Mb RAM (recommended 512Mb).
• Windows 2000 or later.

In particular, note that if your graphics card does not satisfy the above requirements the software will run in Windows GDI mode. This means that display of the screen is handled by Windows and not your graphics hardware and therefore that some features of the software will not be available.

As a general rule, manufacturer graphics cards such as ATI and NVIDEA will satisfy these requirements whilst chipset graphics such as those supplied by Intel will not.

ISIS AND ARES

Users of ARES, or indeed other PCB software will find some of the following PCB design specific features of interest:

• Sheet Global Net Properties which allow you to efficiently define a routing class for all the nets on a given sheet (e.g. a power supply needing POWER width tracks).
• Physical terminals which provide the means to have the pins on a connector scattered all over a design.
• Support for heterogeneous multi-element devices. For example, a relay device can have three elements called RELAY:A, RELAY:B and RELAY:C. RELAY:A is the coil whilst elements B and C are separate contacts. Each element can be placed individually wherever on the design is most convenient.
• Support for pin-swap and gate-swap. This includes both the ability to specify legal swaps in the ISIS library parts and the ability to back-annotate changes into a schematic.
• A visual packaging tool which shows the PCB footprint and its pin numbers alongside the list of pin names for the schematic part. This facilitates easy and error free assignment of pin numbers to pin names. In additional, multiple packagings may be created for a single schematic part.
• A full chapter is provided on how to use ISIS and ARES together.

ISIS AND SIMULATION

Users of ARES, or indeed other PCB software will find some of the following PCB design specific features of interest:

• Sheet Global Net Properties which allow you to efficiently define a routing class for all the nets on a given sheet (e.g. a power supply needing POWER width tracks).
• Physical terminals which provide the means to have the pins on a connector scattered all over a design.
• Support for heterogeneous multi-element devices. For example, a relay device can have three elements called RELAY:A, RELAY:B and RELAY:C. RELAY:A is the coil whilst elements B and C are separate contacts. Each element can be placed individually wherever on the design is most convenient.
• Support for pin-swap and gate-swap. This includes both the ability to specify legal swaps in the ISIS library parts and the ability to back-annotate changes into a schematic.
• A visual packaging tool which shows the PCB footprint and its pin numbers alongside the list of pin names for the schematic part. This facilitates easy and error free assignment of pin numbers to pin names. In additional, multiple packagings may be created for a single schematic part.
• A full chapter is provided on how to use ISIS and ARES together in my coming posts.