COMPARISION BETWEEN CISC AND
RISC:
RISC (Reduced Instruction Set Computer) and CISC
(Complex Instruction Set Computer) stands for two different competing
philosophies in designing modern computer architecture. The difference between
RISC and CISC can lie on many levels, many plausible arguments are put forward
by both sides, such as code density, transistor counts, memory bottlenecks,
complier and decode complexity etc.
CISC computers are based on a complex instructions
are executed by microcode. Microcode allows developers to change hardware
design and still maintain backward compatibility with instructions for earlier
computers by changing only microcode, thus makes a complex instruction set
possible and flexible. While CISC designs allow a lot of hardware flexibility,
the supporting of microcode and slows the microprocessor performance because of
the number of operations that must be performed to execute each of CISC
instruction. A CISC instruction set typically includes many instructions with
different sizes and execution cycles, which makes CISC instructions harder to
pipeline.
RISC VERSUS CISC:
A
CISC processor has most of the following properties:
- Richer instruction set, some simple, some very complex
- Instructions generally take more than 1 clock to execute
- Instructions with variable size
- Instructions interface memory in multiple mechanisms with complex addressing modes.
- No pipelining is used.
- Upward compatibility within the family
- Microcode control
- Work well with simpler compiler
As time passed, one of the
non-RISC architecture with large market is the Intel x 86
families; it has some specific characteristics associated with CISC:
- Segmented memory model
- Few registers
- Crappy floating point performance
DIFFRENCE BETWEEN CONTROLLER
AND PROCESSOR:
MICROCONTROLLER:
Microcontrollers are used in a
wide number of electronic systems such as:
- Engine management systems in automobiles.
- Keyboard of a PC.
- Electronic measurement instruments (such as digital millimeters, frequency oscilloscopes)
- Printers.
- Mobile phones.
- Televisions, radios, CD players, tape recording equipment.
- Hearing aids.
- Security alarm systems, fire alarm systems, and building services systems
Microprocessor:
Microprocessor is the integration of a number
of useful functions into a single IC
Package. These functions are:
- The ability to execute a stored set of instructions to carry out user defined tasks.
- The ability to be able to access external memory chips to both read and write From the memory.
MICROCONTROLLER
|
MICROPROCESSOR
|
In
built memory
|
External memory
|
Internal
I/O Circuit
|
External
I/O Circuit
|
More
bit handling Instructions
|
Few
bit handling instructions.
|
That we can interface a microcontroller
Directly
means, "for example we can directly connect a Keyboard to
microcontroller to any of its ports".
|
Microprocessor we can't interface directly...we
require a circuit board since it requires
RAM, IC.....etc
|
Designed
to perform a small set of specific functions
|
Designed
to perform a wider set of general-purpose functions.
|
RISC architecture
|
CISC architecture
|
Pin Diagram
Difference between 8031, 8051, 8052:
Controller
|
On-chip data memory
|
On chip program
Memory
|
No of 16bit
Timers/counters
|
No of vectored interrupts
|
8031
|
128
|
None
|
2
|
5
|
8051
|
128
|
4k ROM
|
2
|
5
|
8052
|
256
|
8k ROM
|
3
|
6
|
|
|
|
|
|
PIN DESCRIPTION:
VCC Supply voltage.
GND
Ground.
PORT 0:
Port 0 is an 8-bit open drain bidirectional I/O
port. As an output port, each pin can sink eight TTL inputs. When 1s are written
to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also
be configured to be the multiplexed low-order address/data bus during accesses
to external program and data memory. In this mode, P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the
code bytes during program verification. External
pull-ups are required during program verification.
PORT 1:
Port
1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins,
they are pulled high by the internal pull-ups and can be used as inputs. As
inputs, Port 1 pins that are externally being pulled low will source current
(IIL) because of the internal pull-ups.
PORT 2:
Port
2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins,
they are pulled high by the internal pull-ups and can be used as inputs. As
inputs, Port 2 pins that are externally being pulled low will source current
(IIL) because of the internal pull-ups. Port 2 emits the high-order address
byte during fetches from external program memory and during accesses to
external data memory that uses 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that uses 8-bit addresses (MOVX @ RI); Port 2
emits the contents of the P2 Special Function Register. Port 2 also receives
the high-order address bits and some control signals during Flash programming
and verification.
PORT 3:
Port 3 is an 8-bit
bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
3 pins that are externally being pulled low will source current (IIL) because
of the pull-ups. Port 3 receives some control signals for Flash programming and
verification. Port 3 also serves the functions of various special features of
the 8051.
PORT PIN ALTERNATE FUNCTIONS:
- P3.0 RXD (serial input port)
- P3.1 TXD (serial output port)
- P3.2 INT0 (external interrupt 0)
- P3.3 INT1 (external interrupt 1)
- P3.4 T0 (timer 0 external input)
- P3.5 T1 (timer 1 external input)
- P3.6 WR (external data memory write strobe)
- P3.7 RD (external data memory read strobe)
RST:
Reset input. A high on
this pin for two machine cycles while the oscillator is running resets the
device. This pin drives high for 98 oscillator periods after the Watchdog times
out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this
feature. In the default state of bit DISRTO, the RESET HIGH out feature is
enabled.
ALE/PROG:
Address Latch Enable (ALE)
is an output pulse for latching the low byte of the address during accesses to
external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/6 the
oscillator frequency and may be used for external timing or clocking purposes.
Note, however, that one ALE pulse is skipped during each access to external
data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR
location 8EH. With the bit set, ALE is active only during a MOVX or MOVC
instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable
bit has no effect if the microcontroller is in external execution mode.
PSEN:
Program Store Enable
(PSEN) is the read strobe to external program memory. When the AT89S52 is
executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access
to external data memory.
EA/VPP:
External Access Enable.
(EA) must be strapped to GND in order to enable the device to fetch code from
external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA will be internally latched on reset. EA
should be strapped to VCC for internal program executions. This pin also
receives the 12-volt programming enable voltage (VPP) during Flash programming.
XTAL1:
Input to the inverting oscillator
amplifier and input to the internal clock operating circuit.
XTAL2:
Output
from the inverting oscillator amplifier.
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